Basic Information Functional Description Application Description Points to Note Others

Functional Description

　

Question 1

How is the PWM function used in the HT45RM03?

Answer

The HT45RM03 is provided with 3 PWM ports, supplied on the PC0-PC5 pins. The PWM function is setup via the following steps:
1. Setup the PWMLEV, PWMCLEV configuration options, to chose the PWM output mode.
2. Setup the PWM mode configuration option to select the PWM as 10bits /(9+1) bits /(8+2) bits /(7+3) bits.
3. Setup PC0-PC5 as an output port.
4. Setup the stop PWM output type - PWMSP0, PWMSP1
5. Select the PWM clock prescaler - PWMPSC0, PWMPSC1, PWMPSC2
6. Enable the PWM & PWM complementary outputs - PWMEN, PWMCEN
7. Activate the PWM and PWM complementary outputs - set PWMCTRL

After implementing the above setup, then if the PC register is set to 1, the PWM will be in its active state.

Question 2

How are the table instructions used and are there any special points to note?

Answer

There are two table read instructions. One is the TABRDC instruction, which will read data from the present page of the Program Memory. The other is the TABRDL instruction which will read data from the last page of the Program Memory. To read table data, the low address of the data must first be placed into the TBLP register before executing the table read instruction. The table low byte data will be placed into the indicated Data Memory register while the high byte data will be placed into the TBLH register. Note that as the Program Memory may be less than 16-bits in width, any unused bits will be read as zero.

Question 3

How is the 8-bit Timer/Counter setup in the Timer Mode?

Answer

The Timer/Event Counters have three modes, the Timer mode the Event Counter mode and the Pulse Width Measurement Mode. To setup the Timer/Event Counter in the Timer mode the following steps should be executed:
Set the bits in the timer control register to: TM1 = 1 and TM0 = 0.
According to the Timer length requirements setup the Prescaler using the PSC0~PSC2 bits in the timer control register
Setup the initial timer value in the TMR register.
Enable the relevant timer interrupt enable flag – ETI and EMI
Switch on the Timer by setting bit TMRC.4 = 1
Once the timer is started it will start to count up. If the bit TMRC.4 = 0, then the timer will immediately stop. The next time the timer is switched on it will begin counting from the previous value from where it was stopped. When the timer register is full, it will overflow to zero and generate an interrupt signal, at the same time the initial value will be reloaded and counting continued.

Question 4

The Holtek microcontrollers each contain a Low Voltage Reset function. If this function is activated, what will be the condition of the I/O pins and Oscillator function?

Answer

When the power supply voltage falls below that of the specified Low Voltage Reset voltage, then the LVR function will be activated. When VDD is greater than the lowest operating voltage but lower than the LVR voltage, the I/O pins will return to their original input condition but the OSC will continue to run. The actual LVR voltage will vary according to process variations. For more details consult the DC Characteristics of the datasheet.

Question 5

How is the 8-bit timer setup?

Answer

The 8-bit Timer/Event Counter is a count up counter. Each time the counter counts to a value of 255 (FFH), it will overflow and reset to zero and at the same time generate a timer interrupt. Therefore if the counter is to be setup to count to a value of N, where N<256, the TMR register must be preloaded with a value equal to 256-N. After this value has been setup the timer can be started. The timer will count from this preloaded value to 255, when it will then overflow to zero (a value of 256), giving an actual value of 256-(256-N) = N.

Question 6

In the configuration options of the emulator for the HT45RM03A, the PWMLEV option has two types of selection, active high and active low. When PWMLEV is selected as active or active low, what is the difference in the outputs of the generated PWM signal?

Answer

The PWMLEV configuration option determines the PWM waveform duty cycle logical relationship for the values in the PWM0~PWM2 registers.
If PWMLEV is selected to be active high, then the value in PWMH/PWML registers determines the high level pulse width for one cycle in the PWM waveform.
If PWMLEV is selected to be active low, then the value in the PWMH/PWML registers determines the low level pulse width for one cycle in the PWM waveform.
For example:
If the PWM is operating in the (9+1) bit mode and Fpwm = 8MHz:
if the PWMLEV configuration option is selected to be active high, then PWMH/PWML = 0014H and the PWM output waveform will be:
PIC 1
if the PWMLEV configuration option is selected to be active low, then PWMH/PWML = 0014H and the PWM output waveform will be:
PIC 2

Question 7

In the HT45RM03A how can the same pair of PWMs, when enabled, be setup to be in phase and when closed to both be high?

Answer

Because of the requirements of machine control on the HT45RM03, it is sometimes required that the PWM pair, when opened, must be in-phase and also, when closed, that they both output high values. To enable a PWM pair, when opened, to have the same phase, it is required to set PWMLEV and PWMLCEV to be 0 and 1 or to be 1 and 0. When they are opened the PWM will be in-phase, however when closed one will be high and one will be low. To close the PWM it is only necessary to set the related bit low, however now the PWM and its related register will not output a high at the same time, it will always be one high and one low. To output a high at the same time, it is only necessary to setup the related bits in the control register, PCC, as inputs and in the options to select pull-high resistors for PC. In this way the related PWM pins will output a high.


Application Description

　

Question 1

How is the software used to calibrate the OPA?

Answer

The calibration steps are as follows:
1) Setup OPAEN = 1 - OPA enabled
2) Setup AOFM = 1 - S3 closed
3) Setup ARS, chose which input pin is the reference voltage - S1 or S2 closed
4) Adjust AOF3-AOF0 until the OPAOP changes
5) Setup AOFM = 0 – open S3 for the normal OPA mode.

Question 2

When the PB3/AN3/OPVIN and PB2/AN2/OPOUT pins on the HT45RM03 are used as an op-amp, can they also be ADC inputs?

Answer

When the PB3/AN3/OPVIN and PB2/AN2/OPOUT pins are used as an op-amp function, if the corresponding ADC function is enabled, then they can also be ADC inputs.

Question 3

When the HT45RM03 PWM is operating in the (9+1) bit mode, how is the PWM interrupt interval calculated?

Answer

1. There are four working mode for the PWM in the HT45RM03, namely the 10-bit mode, the (9+1) bit mode, the (8+2) bit mode and the (7+3) bit mode. No matter which mode the PWM has selected, the PWM interrupt interval will always be the PWM period time.
2. When the PWM in the HT45RM03 is operating in the (9+1) bit mode, the PWM interrupt interval time is calculated by T = 512/Fpwm. Here T is the interrupt interval, Fpwm is the PWM clock frequency. Fpwm is a ratio of the system clock Fsys, the value of which is determined by bits 5~3 in the PWMC register.

For example, if Fsys = 8MHz and bit 5~3 in the PWMC register has the value 001,
then Fpwm = Fsys/2 = 8MHz /2 = 4MHz. T=512/Fpwm = 512/4MHz = 128us.
Under the above conditions, the PWM will generate an interval every 128us.

Question 4

In the configuration options for the HT45RM03, there is an active high and active low selection for PWMLEV, what is this for?

Answer

The PWMLEV option is directed at the chosen PWM0~PWM2 pin. This option controls the output condition of the PWM pins during their on/off state. If PWMLEV selects active high, then PWM0~PWM2, when in the on condition, each PWM pin will output the PWM waveform. When in the off condition, each pin will be low. If PWMLEV selects active low, then PWM0~PWM2, when in the on condition, each PWM pin will output the PWM waveform. When in the off condition, each pin will be high.

Question 5

How is the Timer 1 in the HT45RM03A used to measure a high pulse width?

Answer

Using the HT45RM03A Timer 1 to implement pulse width measurement is achieved using the following steps:
1. First: setup the TMR1C register as follows:
 Set the T1M1/T1M0 bits in the TMR1C register to 11 to place Timer1 into the pulse width measurement mode.
 Set the T1E bit in the TMR1C register to 1 to ensure Timer1 measures high pulses
 Set the T1PSC2/ T1PSC1/ T1PSC0 bits in the TMR1C register to 111 to setup the division ratio of the Timer1 source clock to Fsys/128
 Set the T1ON bit in the TMR1C register to 1 to enable Timer 1
2. Clear TMR1 to 0 to ensure that Timer1 starts counting from 0
3. By using the setup described above, when TMR1 receives a high going edge signal then it will start counting. When TMR1 receives a low going edge signal then Timer1 will stop counting (The T1ON bit in the TMR1C register will be automatically cleared to 0) The value retained in TMR1 will represent the value of the high level pulse width.
4. When the system clock frequency is Fsys=8Mhz then the Timer1 measured pulse width will be equal to T=1000ms/8MHz/128/256= 4.096ms
5. When the measured pulse width value is greater than 4.096ms, then when Timer1 overflows, the RAM can be used to increase the count range.
6. During the measurement process, The T1ON bit in the TMR1C register can be checked to see if it is 0 to determine if the measurement operation has completed.

Question 6

When the interrupt enable INT1 is enabled in the HT45RM03A, why does it only enter the interrupt once?

Answer

The HT45RM03A external interrupt INT1 and the ADC interrupt both use the same interrupt vector 0CH. When the external INT1 interrupt is enabled, and after the interrupt is generated, the external interrupt flag EIF1 will not be automatically cleared. Note that other interrupts after generation will have their flags automatically cleared. Therefore the EIF1 flag should be cleared manually using software if the interrupt is to be generated again.

Question 7

In the HT45RM03A, as the three external interrupt pins INT0A, INT0B and INT0C, all share the same interrupt request flag, how can the interrupt pin source, which generated the interrupt be distinguished?

Answer

When the INT0A, INT0B and INT0C shared interrupt request flag has been set, the pin which has generated the interrupt, can be determined by examining the pin conditions before and after the interrupt occurs. Because the INT0A, INT0B and INT0C pins are all negative edge triggered, by knowing which pin has changed to a low level, the pin which generated the interrupt source can be determined.

Question 8

In the specification of the HT45RM03A, what is the difference between the two different RES circuits?

Answer

Fig. (1) is the general purpose RC reset circuit.
Fig. (2) is the enhanced RC reset circuit for use in noisy environments.
Note: Care should be taken with the reset lines. No matter which reset circuit is used, the reset line should be kept as short as possible and as close to the device as possible.

Question 9

What are the methods for the HT45RM03A to obtain the self address in locking electric vehicle applications?

Answer

In locking electric vehicles, cordless keys will transmit a serial address code and data code. The data codes for the same category of electric vehicles is the same but the address codes for a group of electric vehicles is different.
Therefore different addresses are used to differentiate different electric vehicles. Based on the above principles, for HT45RM03A locking vehicle applications, when the key transmitted signal is received and then when the received address is compared with the vehicle address, if the two addresses match, then the data will be decoded and related data operation will be executed. If the match is incorrect then no decoding is carried out and the no operation is executed. Therefore the key point is how does the HT45RM03A obtain the self address code? For this there are three methods:
1. The HT45RM03A I/O port can be used to read. This method is more simple, however it will use I/O pin resources.
2. Read from the HT45RM03A Program Memory. This method’s disadvantage is that the address can only be written once into the Program Memory, however it does not utilise any I/O pins.
3. Read from an EEPROM (HT24CL02). This method does not require I/O pins and writing to the memory is convenient and it can implement a rolling code. However the disadvantage of this method is increased cost.
As the above three methods all have their advantages and disadvantages, the best solution should be made according to the specific application needs.

Question 10

What is the purpose of inserting a deadtime into the complimentary PWM outputs in the HT45RM03A?

Answer

The reason for the insertion of a deadtime in the HT45RM03A complimentary PWM outputs is to prevent the output pair (PWM and PWMC) from being active at the same time.
For example:
For PWM0 and PWM0C, the no-deadtime waveform is shown in Figure 1, which has the following problem. Here during T1, PWM0 becomes active, and PWM0C becomes inactive. At this time, if the driver start speed is fast and changes to slow, then the PWM0 and PWM0C driver will make both lines active at the same time.
The PWM0 and PWM0C outputs which include a deadtime are shown in the following diagram: Figure 2
As shown in the diagram, there is a deadtime for the PWM0 and PWM1 outputs. During T1, PWM0C is changed to inactive and during T2, PWM0 is changed to active. In this way, if the outputs are slow in switching off, the situation of a pair of outputs being simultaneously active can be prevented.
In the HT45RM03A, the time chosen for the deadtime is adjustable. The deadtime should not be too short as if so both complementary outputs may be active at the same time. The deadtime should also not be too long, as this will influence the efficiency. The chosen time for the deadtime should adjusted according to the driver speed.

Question 11

The RESB/PD1 configuration option for the HT45RM03A has two choices. After the PD1 input pin option is selected, will the condition of the PD port influence the system reset?

Answer

For the RESB/PD1 configuration option, if the RESET pin option is chosen then a reset circuit is required to be connected to this pin. When this pin is pulled low then a reset will be generated. If the PD1 input pin option is selected then the reset circuit is not needed and now PD1 will have an input only function. Also the PD1 pin will have no effect on the internal reset circuit.

Question 12

When the PWMH/PWML registers in the HT45RM03A have a value of 3F0H~3FFH, why does the PWM output not generate an interrupt?

Answer

1. If the PWM control registers are setup correctly, and the PWM interrupt control register enables the PWM interrupt, then the PWM output will generate an interrupt on every rising edge output.
2. If the PWMH/PWML register value is 3F0H~3FFH, then each PWM output will be fully active or fully inactive and therefore will remain at a permanent high or low level. Therefore as there is no rising edge signal, subsequently no interrupt will be generated.

Question 13

In theft prevention electric vehicle applications, how can the HT45RM03A be used to generate an alarm signal?

Answer

For theft prevention electric vehicle applications, an alarm signal must be generated. The principle is to have a signal of continuously varying frequency between 2 KHz and 4 KHz (square wave or sine wave) to drive a piezo sounder or speaker, with a period of about 0.2s (lower times means more rapid alarm signal). Based on this principle, the HT45RM03A only has to generate the above signal and transmit it to a piezo sounder or speaker. The key point is therefore how to use the HT45RM03A to emulate this changing frequency waveform. This can be subdivided into three parts:

1. Waveform output: select the I/O, PFD as the output. The output frequency is 2KHz (can be varied according to specific needs).

2. Frequency changing: First determine the length of time for the changing frequency. Based on the frequency, it is required to change the frequency from 2KHz to 4KHz within half a period (0.1s). For example if the frequency sampling rate is 100 times, then the frequency change time is 0.1s/100=1ms. Therefore every 1ms the frequency will change. This can be done by setting the TIMER1 time to 1ms, which will reduce or increase the frequency every 1ms interval. The increase or decrease range is (4000-2000)Hz/100=20Hz. Here, higher sampling rates results in more refined sounds, but the range of frequency needs to be smaller.

3. Determine if 4KHz has been reached; this can be done by checking if the step (2) frequency has reduced to 2KHz, otherwise repeat step (2)

After one period has been generated, this can be setup as a subroutine and continuously called to hear a continuous alarm signal.

Question 14

When using the HT45RM03A device in electric bicycle applications, how is the converter A/D value used for speed regulation?

Answer

Presently electric bicycles all use PWM controlled brushless DC motors for speed control. There are many methods of speed regulation. One example is PI regulation which provides a gradual regulation method as follows:

1. First read the crank A/D converted value, then according to this A/D look up table find the corresponding PWM output setup value. The PWM setup value and the speed has a direct one to one relationship.

2. Then in the PWM interrupt subroutine, at every time interval, compare the present PWM output value and the PWM setup value. If the present PWM output value is less than the PWM setup value, then increase the PWM output value, or if the PWM output value is greater than the PWM setup value then decrease the PWM output value, until the output value is equal to the setup value. In this way when using the crank to adjust the speed, the speed will increment or decrement smoothly.

3. Finally, the crank A/D value determines the object speed value. If this speed is required to be reached, then the corresponding PWM value is not immediately outputted, rather in the PWM interrupt subroutine program, the PWM output value is gradually increased or decreased, allowing the speed to smoothly approach the setup value.

Question 15

When using the HT45RM03A in electric bicycle applications how is the E-ABS brake implemented?

Answer

Presently most electric bicycles on the market use E-ABS braking systems. The E-ABS braking effects are obvious, as well as not consuming electrical energy and not harming the motor. Therefore how can the HT45RM03A be applied in its implementation? There are two methods:

1. Short circuiting the electric motor at least two related lines. At this time setup the HT45RM03A program to short out the three lines. Here the electric motor internal stator coil becomes a closed loop. When the stator rotates, this will interrupt the magnetic induction lines, which will in turn generate a magnetic field to resist rotation.

2. The present brushless motor control method is three line six state. From among the eight signals generated by the three hall effect sensors (120 degrees): 001, 010, 011, 100, 101, 110, 111 and 000, there are two conditions which are not used: 000 and 111.

Removing these two, the 6 signals can determine 6 motor positions. For this reason when the HT45RM03A reads any condition, for example 001, the software will consider it at the opposite condition, such as 110, thus controlling the motor rotation. In this way the internally generated magnetic field will generate a force in the opposite direction, resulting in a braking effect.

Question 16

When the HT45RM03A implements a conversion process what is the smallest time that the A/D input signal must be maintained for?

Answer

In HT45RM03A applications, sometimes it is required to measure signals of short duration. If the signal is especially short, this will require a faster A/D clock. However when the A/D converter clock exceeds 1MHz, then an inaccurate conversion value may be obtained, so for an accurate A/D conversion value the A/D clock should not exceed 1MHz. The clock divider ratio for the A/D in the HT45RM03A has eight values: system clock/1, system clock/2, system clock/3, system clock/4, system clock/5, system clock/6, system clock/7 and system clock/8. For example if the system clock is 4MHz, and the system clock/4 division ration is selected then the A/D clock will be 1MHz. Then the A/D clock period, tad = 1/1MHz=1us. Therefore the A/D conversion time will be 16tad =16us. The 16us value includes a sampling time of 4tad =4us, and 16us-4us = 12us internal conversion time. Therefore for a HT45RM03A with a 4MHz system clock and division ratio of system clock/4, to implement an A/D conversion, the A/D signal must remain valid for greater than 4us.