Functional Description
Question 1
How is the PPG in the HT46R12A stopped and started?
Answer
Both software and hardware methods can be used to start and stop the PPG.
1. Using software bit p0st in the ppg0c register, if set to 1, will start the PPG. If cleared to 0, then it will stop.
2. Using hardware, then after enabling Comparator 0 and Comparator 1, when an external signal causes Comparator 1 to output a falling edge, then the PPG will start. To stop the PPG, it is only then necessary for an external signal to cause Comparator 0 to output a falling edge.
Note that after the PPG starts, when the PPG timer overflows, the PPG will automatically clear the P0st bit and stop operating.
Question 2
When the PPG is operating in the synchronous mode, how is the activating edge selected?
Answer
The synchronous mode of the PPG uses ensures that the PPG pulse generator extension is less than 0.5 of the system clock period. Therefore the PPG timer activation edge corresponds to the next arriving system clock edge. For example, after the activating edge starts the PPG, if the first arriving clock edge is a falling edge, then the PPG timer will later only by activated by falling edges. Similarly, if after the activating edge starts the PPG, if the first arriving clock edge is a rising edge, then the PPG timer will later only be activated by rising edges. In this way the PPG pulse generation extension is ensured to be less than or equal to 0.5 of the system clock period.
Question 3
For the HT46R12A, when the PPG output stops, such as when the PPG timer overflows or due to a software instruction (P0ST changing from 1 to 0), what action does the system have?
Answer
The following four actions:
1. Stop and clear the PPG prescaler (presaler indicates the related counter, not the P0PSC[2:0] bit setup in PPG0C)
2. Reload data into the PPG counter
3. Clear P0ST to “0”
4. Load PPG0
Application Description
Question 1
In the HT46R12A/14A, once the comparator is enabled, can its pin-shared output still be used as I/O pins?
Answer
Once the comparator is enabled, PC0/PC1/PC4 still retain their input/output functions. PC2/PC3 can only be used as inputs. Additionally any pull-high options on these pins will have no effect.
Question 2
When the PPG in the HT46R12A is counting, if a falling edge is generated on C1OUT/PC3 or P0ST is set to 1, will the PPG restart counting?
Answer
The PPG will not experience a counting restart. This is to say that during counting, if another falling edge is experienced on C1OUT/PC3 or P0ST again activates a signal then this will have no effect.
Question 3
After the internal comparator has been enabled, how can its output status be read?
Answer
After Comparator 0 or Comparator 1 have been enabled, and after PC2 and PC3 have been setup as inputs, then their status can be known from reading C0OUT and C1OUT.
Question 4
How is the PIE bit in the PPG1C register used? What is the correct setup method?
Answer
The P1E bit is used to interchange the C0VO and INT1 trigger signal. When PIE is set to “0”, the PISP signal will be sourced from INT1 and the PIRS signal will be sourced from C0VO. When PIE is set to “1”, the PISP signal will be sourced from C0VO and PIRS will be sourced from INT1. Before setting up bit PIE, first ensure that P1SPEN and P1RSEN are not enabled.
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